i-Chips IP00C812B

4K Dual Input/Output De-interlacer/Scaler LSIi-chipIP00C812

 

The i-Chips IP00C812B Dual De-interlacer/Scaler is a versatile and high-performance solution for video processing applications. This dual-input/dual-output de-interlacer and scaler combines advanced features with a compact design. With a built-in video decoder, ARM9 CPU, LVDS output, and Ethernet and USB interfaces, the IP00C812B offers exceptional functionality and connectivity.

Supporting a wide range of input formats, including interlaced and progressive up to 1080P/WUXGA/2K1K, the IP00C812B ensures compatibility with various video sources. It features two independent de-interlacer/scaler blocks for superior image quality with full 10-bit internal processing.

The IP00C812B offers configurability with single-output mode for Picture-in-Picture or Picture-by-Picture, and dual-output mode for separate outputs or driving a 3-D display through its quad-LVDS output port.

Equipped with advanced image processing algorithms like mirror image, 90-degree rotation, keystone correction, and color uniformity control, the IP00C812B delivers exceptional visual enhancements. Its energy-efficient design reduces standby power consumption with separate power blocks for CPU and image processing.

The IP00C812B eliminates the need for additional components to drive a 3-D display, making it a cost-effective solution. It handles image processing tasks for two video channels on the board, reducing board space, programming complexity, and overall costs.

With support for various input and output formats, de-interlacing capabilities, motion adaptive de-interlacer, diagonal line interpolation, noise reduction, and chroma bug cancellation, the IP00C812B provides comprehensive video processing features.

Other notable features include video decoding, PiP and PoP functions, bitmap OSD with embedded font engine, and an embedded ARM926EJ-S CPU with various interfaces. It also offers external CPU interfaces, image quality control, and compatibility with xvYCC.

The IP00C812B supports external DDR3-SDRAM PC800 memory and features a reliable power supply. Packaged in a compact 900-pin BGA, it measures 35mmx35mm with a 1mm pitch.

With its impressive capabilities in de-interlacing, scaling, warping, and edge blending, the i-Chips IP00C812B is the ultimate solution for advanced video processing in multimedia systems, digital signage, broadcasting, and more. Experience superior performance, flexibility, and cost-efficiency with the IP00C812B.

i-Chips Technology Demo

Block Diagram

IP00C812B

Specifications

Input

  • 30-bit RGB/30-bit YUV4:4:4/20-bit YUV4:2:2/10-bit YUV4:2:2@166MHz
  • 60-bit RGB/60-bit YUV4:4:4/40-bit YUV4:2:2@83MHz(Parallel)
  • Analog: CVBS/S-Video
  • 2176 pixels of active video

Output

  • 2 dual-LVDS outputs@135MHz each
  • Formats:30-bit RGB/YUV4:4:4 or 20-bit YUV4:2:2@166MHz
  • 2176 pixels of active video
  • Pixel clock synchronization for driving 4K output

De-Interlacing

  • Motion adaptive de-interlacer
  • Diagonal line interpolation
  • 3D/MPEG/mosquito/block noise reduction
  • 2:2, 2:3 and multi cadence detection
  • Chroma bug canceller

Scaling

  • 6symbol filter (horizontal only-8symbol) with FIR filter
  • Independent H and V scaling ratios (aspect ratio correction)
  • Coefficient filter ROM embedded (64set)
  • 90degree image rotation
  • Vertical keystone correction
  • H and V flip circuits for image and OSD

Video Decoder

  • NTSC-M, JPN, 4.43 PAL-B, D, G, H, I, CombinationN, 60, &SECAM
  • VBI(Closed caption/CGMS/WSS)data extraction
  • Clamp Pulse output
  • Dot interference, cross color removal

PiP & PoP Functions

  • Two(2) fully independent video inputs
  • Frame rate conversion with frame tear protection

Bitmap OSD

  • 256colors/High color OSD (RGB565)compatible
  • Embedded font engine(65536words)
  • Support for blinking and semi-transparent(4color)OSD

Embedded CPU

  • ARM926EJ-S core with 16KB instruction, 8KB data
  • Work RAM(64KB)
  • Ethernet, USB2.0(host, function)
  • DMAC(2ch)/UART(4ch)/I2C(master/slave)
  • Timer(4ch)/Interruption control/IR remote control/RTC
  • 10-bit ADC(8ch)/10-bit DAC(6ch)

3D

  • HDMI 1.4a compatible (with external receiver & transmitter)
  • 120MHz alternate output, 60Hz simultaneous output

External CPU Interface

  • 8-bit parallel, 4-line serial(with external CPU)
  • External connection to Flash/SRAM/SDRAM
  • Address:25-bit/Data:16-bit
  • External interruption input(4 line)

Image Quality Control

  • 12-bit gamma correction with interpolation (up to 7 LUTs available)
  • Bias x3, Gain x2, CSC equipped for RGB <-> YUV
  • Color management function
  • Fully compatible with xvYCC
  • Uniformity correction
  • Input image detection of APL, Histogram, Min/Max, edge strength/position measurement, etc.

External Memory

  • Memory-bus 64-bit 800MHz
  • DDR3-SDRAM PC800(1G/512M/bit x16)x4

Power Supply

  • 3.3V, 1.5V and 1.2V
  • Separate power consumption (Scaler and CPU)

Package

  • 900-pin BGA, 35mmx35mm (1mm pitch)

For more information: