i-Chips IP00C821

2K Dual Input Pip De-interlacer/Scaler/Warping/Edge-blending LSIi-chipIP00C821

 

The IP00C821 is an advanced and versatile image processing device designed for high-performance video applications such as projectors and monitors. It combines a 2-channel scaler, de-interlacer cores, and a 1-channel warping and edge-blending engine into a single device, providing enhanced functionality for seamless image transitions.

With dual-input capability, this device allows independent enlargement, shrinking, and de-interlacing of images, enabling the generation of Picture-in-Picture (PiP) or Picture-by-Picture (PoP) output images. It incorporates an embedded CPU and various peripherals including LVDS Tx, video decoder, USB, Ethernet, and SD card interfaces, offering comprehensive connectivity options.

The IP00C821 excels in image control with features like gamma and uniformity correction, ensuring exceptional image quality. It supports a wide range of input formats, including RGB and YUV, and offers output options such as high-speed LVDS interfaces. With an extensive input and output image size capacity, it can handle resolutions of up to 16384 pixels per line with 2048 pixels of horizontal active video.

This device also boasts powerful image manipulation capabilities. The warping functionality enables precise coordinate correction and keystone correction, allowing for image adjustments even at angles up to 45 degrees. Additionally, it supports rotation, mirroring, flipping, overlaying, and alpha blending, providing flexibility in creating captivating visual effects.

Equipped with an ARM926EJ-S equivalent embedded CPU and a variety of peripherals like Ethernet, USB2.0, and SD card interfaces, the IP00C821 offers seamless integration and expanded control options. Its comprehensive feature set includes DMAC, UART, I2C, timers, interruption control, IR remote control, ADC, DAC, and more.

The IP00C821 operates with multiple power supply voltages and is packaged in a compact 684-pin BGA format, making it suitable for space-constrained applications. It fully supports standards like xvYCC and Bt.2020, ensuring compatibility with the latest color technologies.

With its advanced image processing capabilities, the IP00C821 empowers users to achieve superior image quality, seamless transitions, and captivating visual effects in a wide range of high-performance video applications.

i-Chips Technology Demo

Block Diagram

i-chipIP00C821

Specifications

Input（2-port)

  • RGB 30bit / YUV 4:4:4 30bit / YUV 4:2:2 20bit / YUV 4:2:2 10bit(BT656) 166MHz LV-CMOS(2-port) supporting dual (EVEN/ODD) and DDR inputs
  • Analog input:CVBS(NTSC, PAL, SECAM)

Output （1-port）

  • RGB 30bit / YUV4:4:4 30bit / YUV4:2:2 20bit / YUV4:2:2 10bit (BT656) 166MHz high speed LVDS/83MHz x2 LVDS

Input & Output Image Size

  • Up to 16384 pixels/line with 2048 of horizontal active video

External Memory

  • DDR3-SDRAM　16bit PC1600 (4G/2G/1G bit x16) x1

Input/Output Sync

  • Frame rate conversion
  • Tearing protection
  • External force synchronization

Video Decoder

  • NTSC-M, JPN, 4.43 PAL-B, D, G, H, I, CombinationM, 60, SECAM
  • VBI(Closed Caption/CGMS/CGMS/WSS) data extraction
  • Clamp pulse output

De-Interlacer

  • Motion adaptive filter based on Y, U, V
  • All major cadences supported
  • YUV4:2:2

Scaler

  • 6 symbol filter with FIR filter(10 bit/pixel), embedded ROM(64sets)

Noise Reduction

  • 3D(H,V,Temporal) / Mosquito / Block NR, chroma error filter

Bit Map OSD

  • 256 colors/High color OSD(64K colors)
  • Embedded font engine(65536 words)
  • Blinking and semi-transparent(4 colors OSD)
  • 90-degree rotation, OSD scroll
  • Serial flash to bitmap

Image Quality Control

  • Edge-blending (RGB independent gamma correction, white peaking, by region and per pixel correction)
  • Color management (full color gamma)
  • Uniformity correction (by region and per pixel available
  • Bias/Gain/Gamma correction
  • H/V edge enhancement (9 symbols)
  • Dithering for 10, 8, and 6 bits output

Image Manipulation

  • Warping (coordinate correction look up table, embedded warp table generator for key stone correction)
  • Any angle rotation (up to 45 degree rotation + 90 degree rotation)
  • Mirror / flip / 90-degree rotation
  • 2-ch overlay, alpha blending, color key blending

Embedded CPU

  • ARM926EJ-S equivalent (ARM V5TE except for jazelle and ETM9)
  • Cache (16KB Instruction, 16KB data)
  • Work RAM (128KB)
  • 8-bit parallel / 4-wire serial when external CPU is in use

CPU Interface

  • Direct connection with external parallel or serial flash / SRAM / SDRAM
  • Address / data width 26bit / 16bit

CPU Peripherals

  • Ethernet, USB2.0, SD Card
  • DMAC(8ch) / UART(3ch) / 12C(master/slave 3ch)
  • Timer(6ch) / Interruption control / IR remote control
  • 10bit ADC(8ch, MUX) / 10bit DAC(3ch)

xvYCC/Bt.2020 are fully supported

Power Supply

  • 3.3V/2.5V/1.5V/1.0V

Package

  • 684-pin BGA(0.8mm pitch), 27mmx27mm

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